<p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Why Work at Ross Video? We have a great group of people working together to create and deliver cutting edge products that look amazing and are easy to use. We go all out so that our customers can have the best possible experience and achieve quality results. With a product focus, continual learning, results driven processes, and creative thinking, we constantly strive to improve our solutions and to deliver results. If you've ever watched live television, news, sports, or entertainment, you've seen our products in use. All of the major Hollywood award shows, most professional sports teams, and many of the largest broadcasters in the world use Ross Video technology. Get behind the scenes and learn about what it takes to make live events possible. If that resonates, and you’re someone with integrity, commitment, and a strong drive to deliver great products, we’d love to hear from you.</span></p>
<!--_dfFormat_=html--><p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong><span style="line-height: 115%;">Job overview:</span></strong></span></p>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">We are seeking an FPGA Team Lead to join the Graphite Switcher team. Our group is responsible for implementing standalone Linux embedded and PC based Windows/Linux based products. The ideal candidate is a senior developer with the ability to define chip level features and technical requirements and then implement the optimal methodology for the team to deliver the design. Here is the opportunity to join a team developing platforms which integrate a myriad of different video, audio and transport technologies for world-class media production solutions.</span></p>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong><span style="line-height: 115%;">Who you report to:</span></strong><span style="line-height: 115%;"> Senior Manager, Technical Product Management</span></span></p>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong><span style="line-height: 115%;">What we offer:</span></strong></span></p>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Ross offers competitive salaries, comprehensive health plans, and several perks to help you perform at your best. Some of these perks include flexible hours, generous paid time off, fitness/wellness allowance, an employee share ownership program, development support, and a ton of fun social activities and events! Best of all, you will be part of the Ross Video family, and we've got an energizing environment here. </span></p>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong><span style="line-height: 115%;">What the job is all about:</span></strong></span></p>
<ul>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">In conjunction with FPGA architects, system architects, Marketing and Product managers, develop and maintain high-level and detail design specifications.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Work with FPGA developers to design, write, edit, and test FPGA coding as per the specifications or guidelines.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Oversee the development of FPGA design specifications, working with product managers, software design team and hardware design team.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Responsible for direction and coordination of the FPGA staff including the scheduling of tasks, verification of work, and monitoring progress.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Advise and make recommendations to management on matters relating to FPGA development, including toolset selection, methodologies and design guidelines, to provide them with an improved basis for decision making and planning.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Work with the team on scheduling and assigning verification and development tasks.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Assist manager in prioritizing bugs.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Responsibility for the load building and releasing for all the projects.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Schedule code inspections for the projects.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Support Hardware Manager and Project Managers as required.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Assist in training other staff members.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Perform other related duties as required.</span></li>
</ul>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong><span style="line-height: 115%;">Who you are:</span></strong></span></p>
<ul>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Senior level FPGA design knowledge and experience including:</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">System architecture</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Resets, clock domains, flow control, processing, arbitration, etc.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">FPGA building blocks</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">High speed transceivers, DDR4/5 interfaces, PLL’s, PCIe, etc.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Design Implementation</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Tool design flows, place and route optimization, timing closure, etc.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Current AMD (Xilinx) and Altera (Intel) devices and associated design and debugging tools</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Strong Verilog and System Verilog coding and verification skills.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">A familiarity with C, C++ and other design languages.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Above average, Windows and Linux computer skills.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Post-secondary degree in Engineering or in a related area with appropriate experience.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Knowledge of television production would be very useful.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">An understanding of Digital video and audio standards would be an asset.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Minimum 5 years FPGA & HW development experience with expertise in Video/Audio technologies preferred.</span></li>
<li>Strong leadership, interpersonal and observational skills. Able to lead a team of diverse individuals.</li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Organized and very detail orientated.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Self-starter, quick learner and can work with minimum supervision in meeting schedules and project deadlines, balancing risks appropriately to optimize success across all business aspects – good, fast, and cheap.</span></li>
<li><span style="font-size: 10pt; line-height: 115%; font-family: arial, helvetica, sans-serif; color: rgb(0, 0, 0);">Able to work independently or as part of a team.</span></li>
</ul>
<p style="margin: 0in 0in 8pt; line-height: 115%; font-size: 12pt; font-family: Aptos, sans-serif;"> </p><p><span style="color: rgb(0, 0, 0); font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Equity, Diversity & Inclusion<br></strong>At Ross, we embrace diversity, and we want you to bring your authentic self to work. We are committed to building a team that includes a variety of backgrounds, perspectives, and skills. Inclusivity drives innovation and creativity, and that’s something we’re passionate about at Ross! We believe everyone should be able to enjoy a rewarding career at Ross, regardless of race, colour, religion, sexual orientation, gender, gender identity or expression, marital status, age, veteran status, physical or mental disability. If a disability means that you need any additional support during the recruitment process, please contact Talent Acquisition and we will make all reasonable efforts to accommodate your request.</span></p>
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